In the manufacture of semiconductor devices or the like, the introduction of foreign matter and the occurrence of a defect in the manufacturing process may cause a fault in the product. It is therefore necessary to quantitatively check the existence of foreign matter and defect, so as to monitor the manufacturing environment. Also, it is necessary to grasp how the foreign matter and defect influence on the yield, and take countermeasures against them in order to improve the yield.
The detection and inspection of the foreign matter and defect are achieved by, for example, a method disclosed in Japanese Laid-Open Patent Application No. 2000-200358 (published on Jul. 18, 2000). This method is performed in the following manner, as shown in FIG. 27. First, in the first step in the manufacturing process, a foreign matter or defect is detected by an automatic appearance inspection device, so that coordinate data of the foreign matter or defect is acquired. In the following second step, a foreign matter or defect is detected by the automatic appearance inspection device in a similar manner, so that coordinate data of the foreign matter or defect is acquired. The sets of coordinate data obtained in the aforesaid two steps are compared with each other. As a result, it is determined where the foreign matter or defect occurs, in the first step or the second step.
A manufacturing device that gives rise to a shape defect is specified by, for example, a method disclosed in Japanese Laid-Open Patent Application No. 5-41353 (published on Feb. 19, 1993). According to this method, as shown in FIG. 28, the manufacturing device is specified in such a manner that, an ID of a manufacturing device having been subjected to the process is patterned on the wafer, as a code pattern, in order to record the history of the manufacturing device that performed the process.
As the circuit pattern of a product is intricate, the detection of a foreign matter and defect becomes difficult. Taking into account this fact, Japanese Laid-Open Patent Application No. 2000-236006 (published on Aug. 29, 2000) discloses such a method that, in order to improve the precision of the defect inspection, a purpose-built monitor wafer is used instead of the inspection of the product itself. According to this method, as shown in FIG. 29, a die pattern is formed on a part of a monitor wafer so that the position of a foreign matter or defect is highly precisely monitored. This improves the precision of the detection of the coordinates of the foreign matter or defect. Moreover, the insufficiency of sensitivity of a product circuit pattern is compensated. Since the distribution of foreign matters and/or defects on a wafer is often peculiar to each type of manufacturing device, the result of the monitoring contributes to the improvement in the devices.
Furthermore, Japanese Laid-Open Patent Application No. 64-44038 (published on Feb. 16, 1989) discloses such a technology that wafers whose positions of the orientation flat faces are different from each other are, by using an wafer setting device, set on a process guiding electrode in a processing chamber of a sheet-feed dry etching device. According to this arrangement, the wafers can be rotated for different angles. Therefore, the positions of the orientation flat faces can be changed and hence the production yield of semiconductor devices is improved.
However, as the size of semiconductor devices reduces, the size of foreign matter and defects that may cause a fault in the product also reduce. This causes such a problem that foreign matters and defects cannot be detected on account of the lack of sensitivity of the appearance inspection device, because the size of the foreign matters and defects is too small.
Even if the appearance inspection device is capable of detecting foreign matters and defects, a time required for the manufacture is lengthened because of a time for the appearance inspection carried out during the manufacturing process. That is to say, in a case where the inspection is performed in each step as illustrated in Japanese Laid-Open Patent Application No. 2000-200358, a time required for the manufacture becomes lengthy. Also, according to the method of Japanese Laid-Open Patent Application No. 2000-200358, the inspection is actually performed after a plurality of steps are carried out, and hence it is difficult to specify which device caused the fault and to specify in which step the fault occurred.
In the method illustrated in Japanese Laid-Open Patent Application No. 5-41353, the ID of the device having been treated is patterned on a wafer. The method therefore has such a problem that the generation of dust on account of the patterning may cause a fault in the product. Moreover, according to the method, the history of treatment is recorded but it is still difficult to specify which device caused a fault.
The method illustrated in Japanese Laid-Open Patent Application No. 2000-236006 requires a purpose-built wafer for detecting foreign matters. Moreover, since the contamination with foreign matters often occurs suddenly, there may be no foreign matters at the time of manufacturing the monitor wafer.
Furthermore, since the purpose of the method disclosed by Japanese Laid-Open Patent Application No. 1-44038 is to prevent unusual electric discharge on account of the uniformly-directed orientation flat faces, the document does not at all disclose a method for specifying which processing device caused a fault.